1 ? fn6319.2 ISL59119 triple channel sd video driver with lpf the ISL59119 is a triple channe l reconstruction filter with a -3db roll-off frequency of 8mhz. operating from single supplies ranging from +3.0v to +5.5v and sinking an ultra-low 8ma quiescent current, the ISL59119 is ideally suited for low power, battery-operated applications. the ISL59119 is designed to meet the needs for micropower and bandwidth required in battery-operated communication, instrumentation and modern industrial applications such as video on demand, cable set-top boxes, and mp3 players. the ISL59119 is available in an 8 ld soic package and is specified for operation over the full -40c to +85c temperature range. pinout ISL59119 (8 ld soic) top view features ? 5th order 8mhz reconstruction filter ? low supply current (8ma typ) ? supplies from +3.0v to +5.5v ? input signal clamped and level shifted ? pb-free (rohs compliant) applications ? video amplifiers ? portable and handheld products ? communications devices ? video on demand ? cable set-top boxes ? satellite set-top boxes ? mp3 players ? personal video recorder block diagram ordering information part number (note) part marking temp. range (c) package (pb-free) pkg. dwg. # ISL59119ibz* 59119 ibz -40 to +85c 8 ld soic mdp0027 *add ?-t13? suffix for tape and reel. please refer to tb347 for details on reel specifications. note: these intersil pb-free pl astic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-f ree products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. y in c in cvbs in v dd y out c out cvbs out gnd 1 2 3 4 8 7 6 5 x2 y in y out x2 cvbs in cvbs out x2 c in c out + - 8mhz 8mhz 8mhz 1a + - 1a 500mv + - 65mv + - 65mv + - 65mv data sheet august 25, 2008 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2007, 2008. all rights reserved. all other trademarks mentioned are the property of their respective owners.
2 fn6319.2 august 25, 2008 important note: all parameters having min/max specifications are guaranteed. typ values are for information purposes only. unles s otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a absolute m aximum ratings (t a = +25c) thermal information supply voltage from v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . 6.0v input voltage . . . . . . . . . . . . . . . . . . . . . . v dd + 0.3v to gnd - 0.3v continuous output current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ma storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +125c ambient operating temperature . . . . . . . . . . . . . . . .-40c to +85c operating junction temperature . . . . . . . . . . . . . . . . . . . . . . +125c power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. electrical specifications v dd = 3.3v, t a = +25c, r l = 150 to gnd, unless otherwise specified. parameter description conditions min typ max unit input characteristics v dd supply voltage range 3.0 5.5 v i dd quiescent supply current v dd = 3.3v, v in = 500mv, no load 8.4 11.5 ma v dd = 5.5v, v in = 500mv, no load 9.5 12.5 ma v y_clamp y input clamp voltage i y = -100a -40 0 +40 mv i y_down y input pull-down current v y = 0.5v 0.5 1 2 a i y_clamp y input clamp pull-up current v y = -0.2v -2.6 -1.5 ma r y y input resistance 0.5v < v y < 1v 10 m v cvbs_clamp cvbs input clamp voltage i cvbs = -100a -40 0 40 mv i cvbs_down cvbs input pull-down current v cvbs = 0.5v 0.5 1 2 a i cvbs_clamp cvbs input clamp pull-up current v cvbs = -0.2v -2.6 -1.5 ma r cvbs cvbs input resistance 0.5v < v cvbs < 1v 10 m v c_clamp c input clamp voltage v y < 0.08v, i c = 0a 420 550 650 mv i c_down c input clamp pull-down current v c = 1v, v y < 0.08v -60 -40 -25 a i c_up c input clamp pull-up current v c = 0v, v y < 0.08v 25 40 60 a r c c input resistance v y < 0.08v, 0.25v < v c < 0.75v 5 7 10 k i c c input bias current v y > 0.2v -150 0 +150 na v y_sync y input sync detect voltage 80 145 200 mv a v voltage gain 1.95 2.0 2.04 v/v a v c-y-cvbs channel mismatch -2 +2 % psrr dc power supply rejection v dd = 3.3v to 3.6v 35 44 db v dd = 5.0v to 5.5v 45 48 db v os output level shift voltage v in = 0v, no load 60 150 240 mv v oh output voltage high swing v in = 2v, r l = 75 to gnd (dual load) 2.6 3.1 v i sc output short-circuit current v in = 2v, output to gnd through 10 65 ma v in = 100mv, output short to v dd through 10 65 ma ac performance pb passband flatness f = 4.2mhz relative to 1.1mhz, c l = 5pf -1 0 +1 db bw -3db bandwidth c l = 5pf 8 mhz ISL59119
3 fn6319.2 august 25, 2008 connection diagram sb normalized stopband gain f = 27mhz relative to 1.1mhz -60 -50 -40 db dg differential gain ntsc and pal 0.2 % dp differential phase ntsc and pal 0.5 d/dt group delay variation f = 100khz, 5mhz 5.4 ns xtalk crosstalk f = 1mhz, between any two channels -70 db r out_ac output impedance f = 4.2mhz 1.5 +sr positive slew rate 10% to 90%, v in = 0 to 1v step 15 25 45 v/s -sr negative slew rate 90% to 10%, v in = 0 to 1v step 15 20 45 v/s electrical specifications v dd = 3.3v, t a = +25c, r l = 150 to gnd, unless otherwise specified. (continued) parameter description conditions min typ max unit 75 cvbs out x2 y in y out x2 cvbs in cvbs out x2 c in c out + - 8mhz 8mhz 8mhz 1a + - 1a 500mv + - 65mv + - 65mv + - 65mv y (luminance) c (chrominance) cvbs (composite) 3.3v v dd 0.1f 0.1f 0.1f 0.1f 75 75 75 75 y out 75 c out s-video cable pin descriptions pin number pin name description 1y in luminance input 2c in chrominance input 3cvbs in composite video input 4v dd positive power supply 5 gnd ground 6 cvbs out composite video output 7c out chrominance output 8y out luminance output ISL59119
4 fn6319.2 august 25, 2008 typical performance curves v dd = 3.3v, r l = 150 to gnd, unless otherwise specified. figure 1. small signal gain vs frequency -0.1db figure 2. large signal gain vs frequency -0.1db figure 3. bandwidth vs frequency figure 4. gain vs frequency for various c load figure 5. group delay vs frequency figure 6. psrr vs frequency -5 -4 -3 -2 -1 0 1 0.1m 1m 10m frequency (hz) normalized gain (db) v in = 100mv p-p v dd = 5v v dd = 3.3v 100m -5 -4 -3 -2 -1 0 1 normalized gain (db) 0.1m 1m 10m 100m v in = 700mv p-p v dd = 5v v dd = 3.3v frequency (hz) -60 -50 -40 -30 -20 -10 0 10 normalized gain (db) 0.1m 1m 10m frequency (hz) 100m v in = 100mv p-p or 700mv p-p -1 -0.8 -0.6 -0.4 -0.2 0 0.2 gain (db) 0.1m 1m 10m frequency (hz) 100m v in = 100mv p-p c l = 39pf c l = 220pf 0 20 40 60 80 100 120 140 0.1m 1m 10m 100m frequency (hz) delay (ns) v dd = 5v v dd = 3.3v 1k 10k 100k 1m 10m k frequency (hz) -70 -60 -50 -40 -30 -20 -10 0 rejection (db) v dd = 5v v dd = 3.3v v ac = 100mv p-p ISL59119
5 fn6319.2 august 25, 2008 figure 7. output impedance vs frequency figure 8. crosstalk vs frequency figure 9. maximum output magnitude vs input magnitude figure 10. supply current vs supply voltage figure 11. large signal step response figure 12. small signal pulse response typical performance curves v dd = 3.3v, r l = 150 to gnd, unless otherwise specified. (continued) 0 10 20 30 40 50 60 70 80 0.01m 0.1m 1m 10m 100m frequency (hz) impedance (z) v dd = 5v v dd = 3.3v -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.1m 1m 10m 100m frequency (hz) crosstalk (db) chroma to luma cv to chroma y to chroma chroma to cv chroma to cv y to cv cv to y 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 input magnitude (v p-p ) output magnitude (v p-p ) f = 500khz v dd = 5v v dd = 3.3v 8.0 8.2 8.4 8.6 8.8 9.0 9.2 9.4 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 voltage (v) current (ma) inputs floating no load f in = 500khz timebase = 200ns/div vertical scale: 500mv/div f in = 500khz timebase = 200ns/div vertical scale: 100mv/div output ISL59119
6 fn6319.2 august 25, 2008 figure 13. 2t response figure 14. 12.5t response figure 15. ntsc color bar figure 16. s-video output figure 17. differential gain figure 18. differential phase typical performance curves v dd = 3.3v, r l = 150 to gnd, unless otherwise specified. (continued) timebase = 100ns/div input: 200mv/div output: 500mv/div output input timebase = 500ns/div input: 200mv/div output: 500mv/div output input timebase = 10s/div input: 500mv/div output: 1v/div output input y out sync tip: +130mv c out average level: +1.23v timebase = 10s/div y out : 500mv/div c out : 500mv/div -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 input dc voltage (v) differential gain (%) vac = 40mv p-p f = 3.58mhz -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.30.40.50.60.70.80.91.01.11.21.3 input dc level (v) differential phase (%) vac = 40mv p-p f = 3.58mhz ISL59119
7 fn6319.2 august 25, 2008 figure 19. harmonic distortion vs frequency figure 20. total harmonic distortion vs output voltage figure 21. output voltage noise vs frequency figure 22. -3db bandwidth vs input resistance figure 23. response to +500mv dc step on input (see figure 27) figure 24. response to -500mv dc step on input (see figure 27) typical performance curves v dd = 3.3v, r l = 150 to gnd, unless otherwise specified. (continued) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.5m 1.0m 1.5m 2.0m 2.5m 3.0m 3.5m 4.0m 4.5m 5.0m frequency (hz) harmonic distortion (dbc) 3 rd hd 2 nd hd v dd = 3.3v v out = 1.5v p-p r l = 150 thd -80 -70 -60 -50 -40 -30 -20 -10 0 0.5 0.9 1.3 1.7 2.1 2.5 output voltage (v p-p ) thd (dbc) v dd = 3.3v r l = 150 f in = 5mhz f in = 500khz 0 20 40 60 80 100 120 140 160 180 200 1 10 100 10k frequency (khz) voltage noise (nv/ hz) 1000 8.0 8.1 8.2 8.3 8.4 8.5 8.6 8.7 0 100 200 300 400 500 input resistance ( ) -3db point (mhz) all inputs input = ntsc video + 2hz square wave (before coupling capacitor) timebase = 10ms/div input: 500mv/div output: 1v/div output input = ntsc video + 2hz square wave (before coupling capacitor) timebase = 500s/div input: 500mv/div output: 1v/div output ISL59119
8 fn6319.2 august 25, 2008 application information the ISL59119 is a single-supply rail-to-rail triple (one s-video channel and one composite channel) video amplifier with internal sync tip clamps, a typical -3db bandwidth of 8mhz and slew rate of about 25v/s. this part is ideally suited for applications requiri ng high composite and s-video performance with very low po wer consumption. as the performance characteristics and features illustrate, the ISL59119 is optimized for portable video applications. internal sync clamp embedded video dacs typically use ground as their most negative supply. this places the sync tip voltage at a minimum of 0v. presenting a 0v input to most single supply amplifiers will saturate the output stage of the amplifier resulting in a clipped sync tip and degraded video image. the ISL59119 features an internal sync clamp and offset function that level shifts the entire video signal to the optimum level before it reaches the amplifiers? input stage. these features also help avoid saturation of the output stage of the amplifier by setting the signal closer to the best voltage range. the simplified ?block diagram? on page 1 shows the basic operation of the ISL59119?s sy nc clamp. the y and cvbs inputs? ac-coupled video sync signal is pulled negative by a current source at the input. when the sync tip goes below the comparator threshold, the comparator output goes high, pulling up on the input through the diode, forcing current into the coupling capacitor until the voltage at the input is again 0v, and the comparator turns off. this forces the sync tip clamp to always be 0v, setting the offset for the entire video signal. the c-channel is slaved to the y-channel and clamped to a 500mv level at the input. figure 27 shows the setup for testing the clamp?s response to a large step response at the input. once the signals are clamped at the input they are level shifted by +65mv before being amplified by a gain of x2. line drift and dc restore the input coupling capacitor value is chosen from the system requirements. a typica l dc-restore application using an ntsc video horizontal sync will result in a 60s hold time (64s line time minus 4s sample time). the typical input bias current to the video ampl ifier is 1a for the y and cvbs channels, so for a 60s hold time, and a 0.01f capacitor, the output voltage drift is 6mv in one line. the restore amplifier can provide a typical source current of 2.6ma to charge the coupling capacitor, so with a 4s sampling time, the output can be corrected by 1000mv in each line. the drift on the chroma channel is less than 1mv per line. using a smaller value capacitors increases both the voltage that can be corrected, as well as the droop while being held. likewise, using a larger value reduces the correction and droop voltages. a sample of charging and droop rates are shown in table 1. figure 25. package power dissipation vs ambient temperature figure 26. package power dissipation vs ambient temperature typical performance curves v dd = 3.3v, r l = 150 to gnd, unless otherwise specified. (continued) jedec jesd51-7 high effective thermal conductivity test board 0 power dissipation (w) 0.4 1.0 0.8 0.2 0.6 0 100 125 150 50 25 75 85 435mw 909mw j a = + 2 3 0 c / w s o t 2 3 - 6 j a = + 1 1 0 c / w s o 8 jedec jesd51-3 low effective thermal conductivity test board 0 power dissipation (w) 0.2 0.7 0.6 0.1 0.4 0.5 0.3 0 100 125 150 50 25 75 85 391mw 625mw j a = + 1 6 0 c / w s o 8 j a = + 2 5 6 c / w s o t 2 3 - 6 75 75 500 0.1f ntsc video 1hz square wave 150 output ISL59119 ch1 ch2 figure 27. dc step response circuit ISL59119
9 fn6319.2 august 25, 2008 . the sallen key low pass filter the sallen key is a classic low pass configuration. this provides a very stable low pass function, and in the case of the ISL59119, a five-pole roll-off at 8mhz. the five-pole function is accomplished with a second order sallen key filter in series with and before a third order sallen key. output coupling the ISL59119 can be ac or dc coupled to its output. when ac coupling, a 220f coupling capacitor is recommended to ensure that low frequencies are passed, preventing video ?tilt? or ?droop? across a line. the ISL59119?s internal sync clamp makes it possible to dc couple the output to a video load, eliminating the need for any ac coupling capacitors, saving board space, cost, and eliminating any ?tilt? or offset shift in the output signal. the trade-off is larger supply current draw, since the dc component of the signal is now dissipated in the load resistor. typical load current for ac coupled signals is 5ma compared to 10ma for dc coupling. output drive capability the ISL59119 does not have internal short circuit protection circuitry. if the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. maximum reliability is maintained if the output current never exceeds 40ma. this limit is set by the design of the internal metal interconnect. note that for transient short circuits, the part is robust. short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. in video applications, this would be a 75 resistor and would provide adequate short circuit protection to the device. care should still be taken not to stress the device with a short at the output. power dissipation with the high output drive capabi lity of the ISL59119, it is possible to exceed the +125c absolute maximum junction temperature under certain load current conditions. therefore, it is im portant to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. the maximum power dissipation allowed in a package is determined according to equation 3: where: t jmax = maximum junction temperature t amax = maximum ambient temperature ja = thermal resistance of the package the maximum power dissipation actually produced by an ic is the total quiescent supply current times the total power supply voltage, plus the power in the ic due to the load, or: for sourcing use equation 4: for sinking use equation 5: where: v s = supply voltage i smax = maximum quiescent supply current v out = maximum output voltage of the application r load = load resistance tied to ground i load = load current power supply bypassing printed circuit board layout as with any modern operational amplifier, a good printed circuit board layout is necessary for optimum performance. lead lengths should be as short as possible. the power supply pin must be well bypassed to reduce the risk of oscillation. for normal single supply operation, a single 4.7f tantalum capacitor in parallel with a 0.1f ceramic capacitor from v s + to gnd will suffice. printed circuit board layout for good ac performance, parasitic capacitance should be kept to minimum. use of wire wound resistors should be avoided because of their additional series inductance. use of sockets should also be avoided if possible. sockets add parasitic inductance and capacitance that can result in compromised performance. table 1. table of charge storage capacitor vs droop charging rates for y and cvbs channels cap value (nf) droop in 60s (mv) charge in 4s (mv) 10 6 1000 33 1.8 315 100 0.6 100 v droop i b cap value ---------------------------- - line time sample time ? () = (eq. 1) v charge i clamp cap value ---------------------------- - sample time () = (eq. 2) pd max t jmax t amax ? ja -------------------------------------------- - = (eq. 3) pd max v s i smax v s v out ? () + v out r l --------------- - = (eq. 4) pd max v s i smax v out v s ? () + i load = (eq. 5) ISL59119
10 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6319.2 august 25, 2008 ISL59119 small outline package family (so) gauge plane a2 a1 l l1 detail x 4 4 seating plane e h b c 0.010 b m ca 0.004 c 0.010 b m ca b d (n/2) 1 e1 e n n (n/2)+1 a pin #1 i.d. mark h x 45 a see detail ?x? c 0.010 mdp0027 small outline package family (so) symbol inches tolerance notes so-8 so-14 so16 (0.150?) so16 (0.300?) (sol-16) so20 (sol-20) so24 (sol-24) so28 (sol-28) a 0.068 0.068 0.068 0.104 0.104 0.104 0.104 max - a1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - a2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - d 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 e 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - e1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 basic - l 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - l1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 reference - n 8 14 16 16 20 24 28 reference - rev. m 2/07 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m - 1994
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